Hiroshi Inoue           

"How SIMD Width Affects Energy Efficiency: A Case Study on Sorting"
Hiroshi Inoue
IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips XIX), Yokohama, Japan, April 20-22, 2016.

Full text [PDF]: COOLChips_SIMDsort.pdf
Slide [PDF]: COOLChips_SIMDsort_slides.pdf
Data [csv]: COOLChips_SIMDsort_rawdata.csv
Casual explanation: blog post

Abstract
This paper studies the performance and energy efficiency of in-memory sorting algorithms. We put emphasis on the SIMD (single instruction multiple data) mergesort implemented with different SIMD widths. By evaluating the performance, power, and energy with various hardware configurations (achieved by changing the memory bandwidth, number of cores, and processor frequency), our results show that SIMD can reduce power in addition to enhancing the performance, especially when the memory bandwidth is not sufficient to fully drive the cores. We also show that balancing the computation power and the memory bandwidth is important to minimize the total energy consumption.

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