Gregory Czap, Kyungju Noh, et al.
APS Global Physics Summit 2025
Efficiency in charge-to-spin current conversion is a key metric for spin-torque switched magnetic random access memories’ readiness for commercial CMOS integration. Higher efficiency enables faster, more reliable spin-torque writing of a nanomagnet bit. For spin–orbit-torque (SOT) devices, a spin-Hall channel together with a non-magnetic (NM) “spin-harvesting” layer has been proposed as an approach to increase the efficiency beyond the limit of magnetic tunnel junctions. Here, we analyze the scaling relationships between an area-leveraged gain of spin-harvesting and the need to include spin-Hall channel spin-current generator’s impedance and loading. The situation is examined in a spin-Hall channel plus NM spin-conductor stacked structure. We show that spin-harvesting is most effective when the spin-resistance-area product (spin-RA) of the NM harvesting structure is low compared to the spin-Hall channel’s characteristic spin-RA. In appropriate conditions, a harvest gain of well over 4 X in efficiency can be expected compared to a magnetic tunnel junction’s theoretical limit. Such spin-harvesting structure can also mitigate the inherent reduction of SOT efficiency at small nanomagnet sizes, enabling potential applications in more advanced CMOS-technology nodes.
Gregory Czap, Kyungju Noh, et al.
APS Global Physics Summit 2025
Paula Olaya, Sophia Wen, et al.
Big Data 2024
Matthias Gottwald, Guohan Hu, et al.
VLSI Technology and Circuits 2024
Noa Moriel, Michael Morris Danziger, et al.
ISMB 2025