Dr. Subhankar Pal received his MS and PhD degrees in Computer Science and Engineering from the University of Michigan, Ann Arbor, USA. Prior to that, he completed his BE in Electrical and Electronics Engineering from BITS-Pilani, Hyderbad Campus, India. Currently, he is a Postdoctoral Researcher in the Efficient and Resilient Systems department at IBM T. J. Watson Research Center, Yorktown Heights, USA.
He currently works on modeling and scheduling for heterogeneous systems-on-chip (SoCs), and data-secure artificial intelligence (AI) computing. His research interests are in the area of heterogeneous architectures, hardware-software co-design, and accelerating irregular applications.
His PhD thesis explored a software-defined hardware solution that delivers high performance and energy efficiency while retaining CPU-like programmability. He played a pioneering role in architecting OuterSPACE (chip implementation), an accelerator for sparse linear algebra, and Transmuter (chip implementation), a highly programmable, reconfigurable, manycore accelerator for data-intensive applications. These formed the basis for Michigan's effort in the DARPA software-defined hardware (SDH) program.