Prasanth Chatarasi           

Prasanth Chatarasi is a Research Staff Member at IBM T.J. Watson Research Center in Yorktown Heights. He joined IBM Research in 2020 after completing his Ph.D. at the Georgia Institute of Technology. His current research interests are on compilers and micro-architecture of the next-generation AI hardware technologies. He is currently working and leading efforts on systematic, principled, and modular code generation efforts for the current and future IBM's AI Accelerators. 

During his Ph.D., he focused on advancing compiler optimizations for high-performance applications on general-purpose and domain-specific parallel architectures. In the last two years of his Ph.D., he has focused on advancing compilers for mapping Deep Learning (DNN) operators onto flexible spatial accelerators, specialized SIMD units (e.g., Xilinx Versal AI Engine), and thread-migratory architecture (e.g., EMU). Prior to that, he focused on enhancing traditional compilation techniques for both sequential and explicitly parallel programs for performance optimizations and debugging on modern general-purpose architectures (e.g., Multi-core CPUs, SIMD units, and GPUs). 

External links:  Google scholar, DBLP