Investigations of silicon nano-crystal floating gate memories
Arvind Kumar, Jeffrey J. Welser, et al.
MRS Spring 2000
Although carbon nanotube (CNT) transistors have been promoted for years as a replacement for silicon technology, there is limited theoretical work and no experimental reports on how nanotubes will perform at sub-10 nm channel lengths. In this manuscript, we demonstrate the first sub-10 nm CNT transistor, which is shown to outperform the best competing silicon devices with more than four times the diameter-normalized current density (2.41 mA/μm) at a low operating voltage of 0.5 V. The nanotube transistor exhibits an impressively small inverse subthreshold slope of 94 mV/decade-nearly half of the value expected from a previous theoretical study. Numerical simulations show the critical role of the metal-CNT contacts in determining the performance of sub-10 nm channel length transistors, signifying the need for more accurate theoretical modeling of transport between the metal and nanotube. The superior low-voltage performance of the sub-10 nm CNT transistor proves the viability of nanotubes for consideration in future aggressively scaled transistor technologies. © 2012 American Chemical Society.
Arvind Kumar, Jeffrey J. Welser, et al.
MRS Spring 2000
Heinz Schmid, Hans Biebuyck, et al.
Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures
Surendra B. Anantharaman, Joachim Kohlbrecher, et al.
MRS Fall Meeting 2020
Hiroshi Ito, Reinhold Schwalm
JES